Nan ZHOU
Assistant Researcher, Pengcheng Laboratory, Shenzhen, China
I’m Nan Zhou. My research interests include Intelligent Industrial Automation, Intelligent Edge Computing, and Reconfigurable Manufacturing Systems.
Education
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South China University of Technology
Ph.D. in Mechatronics Engineering (Supervisor is Prof. Di Li) Sep. 2013 - Jul. 2021
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South China University of Technology
B.S. in Mechanical Engineering and Automation Sep. 2009 - Jul. 2013
Experience
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Pengcheng Laboratory
Post-Doctoral Research Fellow (Supervisor is Prof. Weihua Gui) Sep. 2021 - Jul. 2024
Service
- Young Editorial Board Member of Natural Science Journal of Hainan University
- Reviewer of 自动化学报
- Reviewer of IEEE Transactions on Pattern Analysis and Machine Intelligence
- Reviewer of IEEE Transactions on Knowledge and Data Engineering
- Reviewer of IEEE Transactions on Industrial Informatics
- Reviewer of IEEE Transactions on Industrial Electronics
- Reviewer of IEEE Transactions on Automation Science and Engineering
- Reviewer of IEEE Transactions on Systems, Man, and Cybernetics-Systems
- Reviewer of International Journal of Production Research
Selected Publications
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Convergence of Reinforcement Learning and Time-Sensitive Networking for Future Industrial AI Agent Communication: Fundamentals, Challenges, and Opportunities
Nan Zhou, Yingfei Yao, Xiaojun Liang, Shunchun Yao, Jiafu Wan, Chunhua Yang, Weihua Gui, Wen Gao
IEEE Communications Surveys & Tutorials 2026 Journal
The rapid proliferation of artificial intelligence in the industrial sector is catalyzing a smart manufacturing paradigm driven by industrial AI agents. In contrast to IT counterparts, future industrial AI agents operate under unique constraints that demand both adaptive intelligence and strictly deterministic communication with ultra-low latency and ultra-high reliability. To address these stringent requirements, the convergence of reinforcement learning (RL) and Time-Sensitive Networking (TSN) has emerged as a critical enabler. This paper presents the fundamentals of RL, TSN, and industrial AI agent communication, and establishes a mapping between AI agent cognitive behaviors, communication requirements, and deterministic networking mechanisms. We propose a four-dimensional framework encompassing intelligent scheduling, dynamic resource management, network convergence and mobility, and application-aware networking to systematically analyze existing RL-for-TSN research and elucidate challenges and requirements for future industrial AI agent communication. Finally, we outline a research roadmap spanning constrained RL algorithms and agent-network co-design to pave the way for deterministic industrial edge intelligence.
Fairness-Aware Deterministic Joint Offloading and Scheduling for Industrial Edge Computing
Yingfei Yao, Nan Zhou, Shunchun Yao, Xiaojun Liang, Wenfeng Deng, Chunhua Yang, Weihua Gui
IEEE Transactions on Industrial Informatics 2026 Journal
Industrial edge computing in time-sensitive, heterogeneous environments faces significant challenges in delivering deterministic, low-latency, and fair task offloading under mixed-criticality traffic. Existing solutions struggle with unpredictable delays, resource contention, and the joint optimization of offloading and scheduling. In this work, we propose a task queue mapping mechanism-based architecture that incorporates formal mixed-deterministic traffic modeling under time-sensitive networking, enabling unified computation and network resource management. The joint task offloading and traffic scheduling problem is rigorously formulated as a two-stage Markov decision process with embedded fairness constraints. To address the strong coupling and computational complexity, we develop a fairness-aware deterministic offloading and resource scheduling (FA-DORS) framework, a hierarchical multiagent deep deterministic policy gradient algorithm, enhanced by a contribution-based local reward mechanism to ensure adaptive resource allocation and fairness. Extensive experimental results demonstrate that in the proposed architecture, FA-DORS achieves lower task latency, higher completion rates, improved resource utilization, and enhanced transmission determinism while ensuring fairness in multitask offloading compared to baseline methods. In particular, FA-DORS achieves an 8.89%–39.15% reduction in average end-to-end delay and up to 39.73% reduction in average jitter under high load, compared with the baseline method.
FGAT: A states labeling method with Fuzzy Graph Attention Network for industrial protocol reverse engineering
Weikang Zhou, Guangfu Ma, Nan Zhou, Xiaojun Liang, Cunnian Gao, Wenfeng Deng, Chunhua Yang, Weihua Gui
Advanced Engineering Informatics 2026 Journal
The deep integration between Information Technology (IT) networks and Operational Technology (OT) networks introduced hybrid traffic patterns and increased link complexity, thereby exacerbating challenges in protocol configuration, conversion, and security assurance. As the foundational prerequisite for these processes, protocol analysis urgently requires transformation from current manual operations to automated, intelligent paradigms capable of performing efficient and accurate reverse analysis on increasingly complex Industrial Internet traffic. Conventional reverse engineering methods demonstrate limited effectiveness in message state labeling for industrial protocols due to their proprietary nature and sequence transparency characteristics, while also failing to adequately capture implicit inter-message relationships. To address these challenges, we propose FGAT, a fuzzy logic aggregation graph neural network based on attention mechanism for industrial protocol message state labeling. Our approach transforms protocol message data into graph structures and performs feature aggregation through attention mechanisms combined with fuzzy logic, thereby incorporating strong relational inductive biases between messages. We conducted experiments on FGAT using industrial traffic data of seven different protocols, and demonstrated the superiority of our method by comparing the classification accuracy of FGAT (97.16%) with the traditional graph neural aggregation method (85.61%/86.96%/87.08%), the latest fuzzy graph neural network methods (81.70%/79.53%), traditional unsupervised deep learning methods (89.98%/69.57%/95.16%/85.98%/86.89%), and the message state labeling method of traditional protocol reverse technology (47.50%/54.26%/71.49%).
Optimization and Evaluation of Container-Based EtherCAT Communication in Virtual PLCs
Nan Zhou, Yingfei Yao, Xiaojun Liang, Shunchun Yao, Chunhua Yang, Weihua Gui
IEEE Transactions on Industrial Electronics 2026 Journal
Deploying EtherCAT in container-based virtualized programmable logic controllers (vPLCs) faces critical challenges regarding driver portability, network determinism, and synchronization scalability. This article proposes a container-native architecture named vECAT by leveraging the data plane development kit (DPDK) for high-performance user-space packet processing, which eliminates kernel dependencies and ensures cross-platform portability. We develop a latency model that characterizes the end-to-end packet processing pipeline and guides systematic optimizations at the task, OS, and hardware levels. We also introduce an enhanced synchronization algorithm to address error accumulation in large-scale networks. Validated on x86, ARM, and RISC-V platforms running PREEMPT_RT Linux, the proposed solution achieves maximum jitters of 11, 12, 24 µs at a 125 µs cycle time on three typical types of vPLCs CPUs under various kinds of stress loads. Furthermore, the optimized synchronization mechanism eliminates the linear accumulation of synchronization error, achieving bounded precision validated on networks with up to 8 subdevices.
Hybrid Synchronous–Asynchronous Execution of Reconfigurable PLC Programs in Edge Computing
Nan Zhou, Di Li
IEEE Transactions on Industrial Informatics 2021 Journal
In edge computing, heterogeneous automation tasks, such as networked motion control and reconfiguration management, have diverse weights on determinism and flexibility. Such heterogeneities escalate the demands on the runtime environments (RTEs) of programmable logic controllers to provide the best-suited rather than one-size-fits-all execution policies for reconfigurable programs. This article presents the proposal and implementation of a novel IEC 61499-based RTE capable of offering hybrid synchronous and asynchronous execution models for function block (FB) based programs. We also construct a runtime reconfigurable FB-type repository by realizing a just-in-time FB-type definitions compiler in the RTE. Finally, we evaluate and compare the proposed RTE and state-of-the-art works by running a set of synthetic benchmark programs and a realistic networked motion control kernel and application. Experiment results from the benchmark programs have shown a maximal 40% faster execution speed in our RTE. Furthermore, our RTE can ensure fewer jitters during distributed motion control with a 1-ms cycle time on a realistic motion control testbed.
Toward dependable model-driven design of low-level industrial automation control systems
Nan Zhou, Di Li, Valeriy Vyatkin, Victor Dubinin, Chengliang Liu
IEEE Transactions on Automation Science and Engineering 2021 Journal
Recent technological advances and manufacturing paradigm evolutions in industrial settings will dramatically increase the complexity of automation control systems. Traditional solutions to the software development of low-level control kernels (e.g., numerical control kernel, motion control kernel, and real-time communication tasks) are unable to cope effectively with such complexity due to an inadequate level of abstraction and challenges for dependability. This article presents a formal semantics integrated model-driven design approach as a holistic solution. A domain-specific modeling language (DSML) is specified based on the adaption of IEC 61 499 architecture, along with the extensions of task model, task-to-resource allocation, and nonfunctional specification. Both formal structural and behavioral semantics of the proposed DSML are then explicitly defined. Design-time formal verification is also achieved by automated model transformations. A metaprogrammable environment is adopted to facilitate flexible modeling, verification, and code generation. A case study is demonstrated on implementing a prototype computer numerical control (CNC) system using the proposed solution. Note to Practitioners—The low-level automation control system in the modern manufacturing scenarios require more agility while respecting strict timing constraints. Handling such complexity with manual coding is getting harder and less efficient. The DSML and the supporting development environment presented in this article aim to enhance the level of automation, flexibility, and dependability of the whole design process. For the proposed DSML, its syntax is formalized and defined as metamodels, while the semantics is integrated through model annotation and transformation. These definitions are implemented as external rules for a metaprogrammable environment to establish our proposed development tool. The finding and insight from this article can enhance efficiency and dependability during the development of common control kernels, such as CNC kernel and motion controller.
Cyber–Physical Codesign of Field-Level Reconfigurations in Networked Motion Controllers
Nan Zhou, Di Li
IEEE/ASME Transactions on Mechatronics 2020 Journal
To be successful in the quickly evolving future of machine building and meet the increasingly complex requirements of manufacturers, equipment manufacturers face challenges of reconfigurability on the motion controller. This article proposes a cyber-physical codesign approach to enable plug-and-play of field devices via real-time Ethernet in controllers. In our proposal, we first design a modular runtime framework to facilitate auto-discovery and self-configuration of servo drives with EtherCAT. Then, we implement a self-adaptive period synthesis method for real-time scheduling. The method can automatically attain a combination of minimized periods for communication and control task during startup and achieve dynamic compensations of drifts and jitters occurred in the network. Through experiments, we show that for various combinations of cyber-physical settings, our proposal can ensure low jitters (<;10 μs) and stable latencies with a 125 μs cycle time and achieve runtime reconfiguration with a 250 μs or larger cycle time.